Graphic LCD Manufacturer China Monochrome Display Module 128×64 ST7565R FSTN Positive COG Display

China Monochrome Graphic LCD Display Module 128×64 ST7565R FSTN Positive COG

ShenZhen Techstar Electronics Incorporated Co., Ltd’s SFBM12864YBA01, a cutting-edge monochrome graphic LCD module.

Key Specifications:

• Dot Matrix: 128×64 Dots
• LCD Mode: FSTN/POSITIVE/TRANSMISSIVE
• Controller IC: ST7565R
• Driving Method: 1/65 Duty; 1/9 Bias
• Viewing Angle: 6 O’clock direction
• Interfaces: 8080 MCU, 6800 MCU, 4-Line SPI
• Operating Voltage: 3.3V
• Operating Temperature Range: -20 to +70℃
• Storage Temperature Range: -30 to +80℃
• Customizable Touch Panel Option:
• While initially touch-free, this module offers customization options for touch panels.

Versatile Applications:

Ideal for POS terminals, cash readers, handheld devices, mobile food ordering machines, meters and instruments, medical analyzers, and more.

Display Data RAM (DDRAM)

The Display Data RAM stores pixel data for the LCD. It consists of a 65-row by 192-column addressable array. Each pixel can be selected by specifying the page and column addresses. The 65 rows are divided into 8 pages (Page 0 to Page 7), each containing 8 lines, and a 9th page (Page 8) with a single line (D0 only). Data is directly written to the 8 lines of each page through D0 to D7. The microprocessor’s D0 to D7 correspond to the LCD common lines. The LCD controller and MPU interface operate independently, allowing data to be written into RAM simultaneously while being displayed without causing flicker on the LCD.

Page Address Circuit

This circuit provides a Page Address to the Display Data RAM. It includes a 4-bit Page Address register that is modified only by the “Set Page Address” instruction. The Page Address must be set before accessing DDRAM content. Page Address “8” represents a special RAM area for icons, and only display data D0 is valid within this page.

Column Address Circuit

The Column Address Circuit features an 8-bit preset counter that supplies Column Address to the Display Data RAM (DDRAM). The DDRAM column address is specified using the “Set Column Address” command. With each display data read/write access, the specified column address is incremented by one (+1), facilitating continuous access to MPU display data. The control flag MY can invert the output order of the COM pads, while the MX flag enables inversion of the relationship between the Column Address and the SEG outputs. After changing the MX flag setting, it’s necessary to rewrite the display data into DDRAM.

Graphic LCD Display Module 128×64 ST7565R FSTN Display Product Drawing 

(without Backlight)

(with Backlight)

Graphic LCD Display Module 128×64 ST7565R FSTN Display Product Image